Scanning electron microscopes (SEMs) are known. The use of SEMs for inspecting various articles of manufacture at various points during their manufacture is also known. The high magnification and large depth of field available from a SEM makes it an invaluable tool in manufacturing. SEMs have found a particularly important place in the integrated circuit (IC) manufacturing process. ICs are typically fashioned on semiconductor wafers. These wafers are almost universally circular and a common diameter of the latest generation of such wafers is approximately 300 mm (12″). Many ICs, typically comprised of thousands of active devices such as transistors, are fabricated simultaneously on the wafer's surface. The small size of these semiconductor devices in such ICs as microprocessors requires an instrument with very high powers of magnification to view and inspect them adequately. Additionally, the various devices and other components that together form such a microprocessor are made from numerous different layers of materials. As a SEM offers both sufficient magnification and sufficient depth of field to inspect ICs both during and after processing, the SEM is the inspection tool of choice for the semiconductor industry.
The operating principles and design considerations of SEMs are known. SEMs use a focused beam of electrons to produce their images. An electron gun generates and accelerates electrons. These electrons then travel through one or more focussing elements and then strike an object being examined. Electrons are either reflected off the object into or knocked off the object into a detector. The pattern of reflected and scattered electrons forms the SEM's image of the object being examined. The use of an electron beam to image an object requires that the object being examined under the SEM be held within a vacuum, as the electron beam would otherwise be scattered by air and water molecules between the final beam focussing lens and the object.
The necessity of surrounding the object being examined by a high level vacuum (typical pressure levels within the sample chamber of a SEM are approximately 1×10−5 Torr) usually restricts the number of object that can be examined in a given amount of time by the SEM, as the removal and introduction of an object into the vacuum chamber requires a non-trivial amount of time to first vent the chamber to ambient air pressure, remove the first object, insert the second object, reseal and then evacuate the sample chamber to the desired pressure level.
Within the semiconductor industry, the extremely delicate nature of a wafer undergoing processing makes the process of placing wafers into and removing them from the sample chamber of a SEM even more burdensome. In existing vacuum chamber designs, the wafer is inserted into the vacuum chamber, usually by means of a loadlock. A loadlock is a small chamber, usually only slightly larger than the sample, which is sealed on one end by a valve connecting it to the vacuum chamber and another valve at the second end connecting it to the atmosphere. Pumps and additional valves allow the pressure to be equalized within the loadlock to either the vacuum chamber or the atmosphere. A sample is introduced into one end of the loadlock, the atmospheric valve closed and the pressure within the loadlock reduced to equal the pressure in the vacuum chamber. When the pressure has been reduced sufficiently, the valve at the other end of the loadlock is opened and the sample moved into the vacuum chamber. Reversing this sequence of operation removes the sample from the vacuum chamber and returns it to the atmosphere.
In known SEMs, after the wafer has been placed in the loadlock and moved to the vacuum chamber, the entire wafer is subjected to the vacuum environment. The wafer is then transferred to a precision stage so that it may be placed and held under the SEM's electron beam. Upon completion of the examination or measurement, the wafer is transferred back to the loadlock, where it is returned to ambient pressure.
This known apparatus, although providing the necessary vacuum conditions for the SEM to function, suffers from a number of significant drawbacks. The vacuum chamber must be sufficiently strong to withstand the atmospheric pressure outside the chamber and sufficiently large to accept the numerous mechanisms which must be inside the chamber to transport the wafer between the loadlock and the SEM's examination stage. Every increase in the size and strength of a vacuum chamber increases its cost. The cycle time required to evacuate and vent the loadlock while exchanging wafers is significant. The mechanical wafer transport devices within the vacuum chamber must also be maintained and repaired on a periodic basis.
Eliminating the vacuum chamber and replacing it with a non-contacting graded vacuum seal, discussed herein as a staged-seal is known from other devices and equipment the must operate in a vacuum environment. See Petric et al., U.S. Pat. No. 4,524,261 in which a staged-seal is used in conjunction with an electron beam lithography system. The Petric patent is incorporated herein for all purposes.
In existing staged-seal apparatus used in semiconductor manufacturing, wafers being processed are held on a moveable x-y stage with a vacuum or electrostatic chuck. The staged-seal and electron beam column components are supported by a structure that bridges around the staged-seal and attached to a supporting base for the system. This supporting base is necessarily massive as it is required to maintain the precise mechanical gap between the wafer and the staged-seal vacuum seal against the forces created by the weight of the column and the vacuum load, both of which tend to reduce or close the gap.
The structure that supports the column must be extremely rigid to maintain the geometric relationships within the micron-level range while simultaneously providing sufficient space for the x-y stage to move over its entire range. The frame must consequently be relatively massive and the footprint of the entire system relatively large. These factors have discouraged the use of staged-seal apparatus.
It should be emphasized that for wafer examination under a SEM the gap between the objective lens of the SEM and the wafer under examination must be maintained with extreme accuracy. Typically, this gap is roughly 2 to 3 mm, but it must be maintained constant within a range of roughly 1 to 2 microns. Especially in the semiconductor wafer examination process, the complex and very fragile pattern formed on the surface of the wafer requires very precise location of the wafer's surface with respect to an X-Y examination stage upon which the wafer is typically located. The fragile nature of the wafer's surface and the depth-of-field requirements of the SEM both drive this requirement for very precisely locating the wafer's surface with respect to the SEM's objective lens. In use, the examination stage and the wafer must typically be co-planar within a range of a few microns.
Known apparatus to locate wafer precisely in this manner typically use complex and expensive actuators to adjust the wafer's height precisely so that the top surface of the wafer would be co-planar with the X-Y examination stage. Precision measuring sensors and a complex feedback control circuit continuously adjust the stage to hold the wafers in place.
The bulky and expensive vacuum stage, with its complex mechanisms to move and then place wafers being examined on an examination stage, and the complex equipment needed to maintain the wafer on the stage in proper co-planar relationship with the stage make SEM inspection of semiconductor wafers an expensive and time-consuming task. Even the replacement of the vacuum chamber with a staged-seal vacuum region has not greatly simplified the apparatus for or reduced the cost of SEM wafer inspection.
A SEM with improved wafer handling abilities would be a significant improvement in the semiconductor test and measurement industry.